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Philips highlights leading consumer-oriented semiconductor R&D at IEDM 2004

Thursday 9 December 2004 16:56 CET | News

At this years IEEE International Electron Devices Meeting (IEDM, San Francisco, USA, 13 - 15 December 2004), Philips R&D scientists will be contributing to 17 different papers on advanced semiconductor research and development.

Detailing R&D carried out by Philips in collaboration with IMEC (Belgium) and the Crolles2 Alliance (a partnership between Philips, Freescale Semiconductor and STMicroelectronics) the majority of these papers cover CMOS process development at the 65-nm and 45-nm nodes, and record-breaking RF CMOS performance at the 90-nm node. The primary focus for Philips is the development of advanced CMOS processes that are compatible with the high-volume low-cost manufacturing requirements of consumer-product applications. In preparation for continued process development within the Crolles2 Alliance, Philips closely collaborates with IMEC on advanced CMOS technologies. This leading-edge research collaboration on the critical challenges in CMOS scaling keeps Philips in a highly competitive position at the forefront of the semiconductor industry. It is the success of the semiconductor industry in keeping pace with Moores Law - the prediction that the number of transistors on a given area of silicon doubles roughly every two years - that has been responsible for driving down the cost and enhancing the performance of everyday products such as DVD players, digital cameras and mobile phones. Although migration from 90-nm to 65-nm should be possible using technology similar to todays, hitting the 45-nm and 32-nm targets on the ITRS roadmap poses considerable challenges for the semiconductor industry. As the thickness of the transistors gate oxide is scaled in line with their channel length, leakage currents through an oxide layer only a few atoms thick threatens to reverse the reduced power consumption normally associated with migration from one CMOS technology node to the next. In addition, the use of new materials such as high-k dielectrics to overcome gate leakage, low-k dielectrics to reduce interconnect capacitance and new metals to replace polysilicon gates considerably increases process complexity. For semiconductor companies serving the consumer electronics industry, this makes it increasingly important that technology improvements continue to be compatible with high-volume manufacturing methods. In addition to highlighting leading research into metal and fully-silicided gate structures, a number of the IEDM papers contributed to by Philips examine ways of minimizing the impact of new materials or manufacturing steps on process complexity and cost. Another important area where new semiconductor technologies are set to make their mark is in RF applications. At the 90-nm node, CMOS transistors have excellent RF performance, allowing them to rival silicon bipolar solutions in some areas of mobile communications and wireless networking. Philips is presenting a paper at this years IEDM that highlights the record-breaking performance of its 90-nm RF CMOS process. It is also presenting papers on new metal-emitter SiGe:C HBTs (Heterojunction Bipolar Transistors) that will enable low-cost silicon-based transceivers for mm-Wave (> 30 GHz) wireless applications; new substrate isolation techniques to improve the RF performance of on-chip passive components; and new methods of modeling RF MOSFET devices.


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